Claude review: arm64: dts: qcom: Add GPU support for Glymur

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

Adds the GPU node (`gpu@3d00000`) and GMU node (`gmu@3d6c000`).

**GPU node:**
- `reg` has 2 entries matching the binding: `kgsl_3d0_reg_memory` at `0x03d00000` (size `0x6c000`) and `cx_mem` at `0x03d9e000` (size `0x2000`)
- 12 OPP entries from 310 MHz to 1850 MHz with appropriate voltage levels
- `#cooling-cells = <2>` for thermal integration (used by patch 6)
- Interconnect to DDR via `hsc_noc`/`mc_virt`
- Two IOMMU entries (SIDs 0 and 1)

**GMU node:**
- 6 clocks (ahb, gmu, cxo, memnoc, hub, rscc)
- CX and GX power domains
- 4 OPP entries from 575 MHz to 750 MHz
- IOMMU SID 5

**Address range verification:**
- GPU: `0x03d00000 - 0x03d6bfff` — no overlap with GMU (`0x03d6c000`)
- gxclkctl (`0x03d64000 - 0x03d69fff`) is a sub-block within GPU register space, which is expected
- cx_mem (`0x03d9e000`) starts exactly where GMU ends (`0x03d6c000 + 0x32000 = 0x03d9e000`) — no overlap

Node ordering follows address order correctly (gpu before gxclkctl before gmu before gpucc).

The top two OPPs (1550 MHz and 1700 MHz) have `opp-supported-hw = <0x7>` and the highest (1850 MHz) has `<0x3>`, meaning they're only available on certain speed bins. This is standard practice.

No issues found.

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Generated by Claude Code Patch Reviewer