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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Taniya Das <taniya.das@oss.qualcomm.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Abel Vesa <abel.vesa@oss.qualcomm.com>,
	Rob Clark <robin.clark@oss.qualcomm.com>,
	Sean Paul <sean@poorly.run>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Akhil P Oommen <akhilpo@oss.qualcomm.com>,
	Dmitry Baryshkov <lumag@kernel.org>,
	Abhinav Kumar <abhinav.kumar@linux.dev>,
	Jessica Zhang <jesszhan0024@gmail.com>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>
Cc: Ajit Pandey <ajit.pandey@oss.qualcomm.com>,
	Imran Shaik <imran.shaik@oss.qualcomm.com>,
	Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org
Subject: Re: [PATCH 4/6] clk: qcom: gxclkctl: Remove GX/GMxC rail votes to align with IFPC
Date: Tue, 7 Apr 2026 13:29:50 +0200	[thread overview]
Message-ID: <73196147-0133-4646-927d-dbe93c254286@oss.qualcomm.com> (raw)
In-Reply-To: <20260407-gfx-clk-fixes-v1-4-4bb5583a5054@oss.qualcomm.com>

On 4/7/26 11:30 AM, Taniya Das wrote:
> The GX GDSC control is handled through a dedicated clock controller,
> and the enable/disable sequencing depends on correct rail voting.
> The driver votes for the GX/GMxC rails and CX GDSC before toggling
> the GX GDSC. Currently, during GMU runtime PM resume, rails remain
> enabled due to upstream votes propagated via RPM-enabled devlinks
> and explicit pm_runtime votes on GX GDSC.
> 
> This is not an expected behaviour of IFPC(Inter Frame Power Collapse)
> requirements of GPU as GMU firmware is expected to control these rails,
> except during the GPU/GMU recovery via the OS and that is where the GX
> GDSC should be voting for the rails (GX/GMxC and CX GDSC) before
> toggling the GX GDSC.
> 
> Thus, disable runtime PM after successfully registering the clock
> controller.
> 
> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
> ---
>  drivers/clk/qcom/gxclkctl-kaanapali.c | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/qcom/gxclkctl-kaanapali.c b/drivers/clk/qcom/gxclkctl-kaanapali.c
> index d7cf6834dd77c2a5320ffb8548cdb515be237bdc..d470ade11b0d11eb40843fe84c809e71646dce27 100644
> --- a/drivers/clk/qcom/gxclkctl-kaanapali.c
> +++ b/drivers/clk/qcom/gxclkctl-kaanapali.c
> @@ -7,6 +7,7 @@
>  #include <linux/mod_devicetable.h>
>  #include <linux/module.h>
>  #include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
>  #include <linux/regmap.h>
>  
>  #include <dt-bindings/clock/qcom,kaanapali-gxclkctl.h>
> @@ -61,7 +62,15 @@ MODULE_DEVICE_TABLE(of, gx_clkctl_kaanapali_match_table);
>  
>  static int gx_clkctl_kaanapali_probe(struct platform_device *pdev)
>  {
> -	return qcom_cc_probe(pdev, &gx_clkctl_kaanapali_desc);
> +	int ret;
> +
> +	ret = qcom_cc_probe(pdev, &gx_clkctl_kaanapali_desc);
> +	if (ret)
> +		return ret;
> +
> +	pm_runtime_disable(&pdev->dev);

My understanding is that this works because we have more than one domain
associated with the nod (so the generic code that would otherwise enable a
single one so long as the device is resumed doesn't apply) and your previous
patch ensures that after probe, the clock controller is being put to sleep,
right before pm_runtime_disable() executes.

Is that right?

Konrad

  reply	other threads:[~2026-04-07 11:29 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-07  9:30 [PATCH 0/6] qcom: Refactor GPU GX GDSC handling and IFPC behavior on A8x GPUs Taniya Das
2026-04-07  9:30 ` [PATCH 1/6] clk: qcom: gdsc: Add custom disable callback for GX GDSC Taniya Das
2026-04-07 10:56   ` Konrad Dybcio
2026-04-08  7:26     ` Taniya Das
2026-04-12  3:46   ` Claude review: " Claude Code Review Bot
2026-04-07  9:30 ` [PATCH 2/6] clk: qcom: gxclkctl: Use custom disable callback for gx_gdsc Taniya Das
2026-04-07 10:56   ` Konrad Dybcio
2026-04-12  3:46   ` Claude review: " Claude Code Review Bot
2026-04-07  9:30 ` [PATCH 3/6] clk: qcom: common: ensure runtime PM suspend completes on probe Taniya Das
2026-04-07 10:58   ` Konrad Dybcio
2026-04-08  7:26     ` Taniya Das
2026-04-12  3:46   ` Claude review: " Claude Code Review Bot
2026-04-07  9:30 ` [PATCH 4/6] clk: qcom: gxclkctl: Remove GX/GMxC rail votes to align with IFPC Taniya Das
2026-04-07 11:29   ` Konrad Dybcio [this message]
2026-04-08  7:25     ` Taniya Das
2026-04-12  3:46   ` Claude review: " Claude Code Review Bot
2026-04-07  9:30 ` [PATCH 5/6] drm/msm/a8xx: Make a8xx_recover IFPC safe Taniya Das
2026-04-07 11:00   ` Konrad Dybcio
2026-04-12  3:46   ` Claude review: " Claude Code Review Bot
2026-04-07  9:30 ` [PATCH 6/6] drm/msm/a6xx: Limit GXPD votes to recovery in A8x Taniya Das
2026-04-07 11:01   ` Konrad Dybcio
2026-04-07 19:16     ` Akhil P Oommen
2026-04-12  3:46   ` Claude review: " Claude Code Review Bot
2026-04-12  3:46 ` Claude review: qcom: Refactor GPU GX GDSC handling and IFPC behavior on A8x GPUs Claude Code Review Bot

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