Claude review: drm/msm/a8xx: Make a8xx_recover IFPC safe

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

This correctly gates GX MMIO access behind a `gx_is_on()` check, preventing bus errors when GX is power-collapsed:

```c
+	if (adreno_gpu->funcs->gx_is_on(adreno_gpu)) {
+		gpu_write(gpu, REG_A8XX_CP_SQE_CNTL, 3);
+
+		if (hang_debug)
+			a8xx_dump(gpu);
+	}
```

**Ordering difference from a6xx_recover.** The commit message says "matching a6xx behavior", but the ordering differs. In `a6xx_recover()` (line 1648-1662 of `a6xx_gpu.c`), the sequence is:

```c
// a6xx_recover:
adreno_dump_info(gpu);
if (gx_is_on) { ... }     // GX check first
a6xx_gpu->hung = true;      // hung set after
```

In the patched `a8xx_recover`:
```c
// a8xx_recover (patched):
adreno_dump_info(gpu);
a6xx_gpu->hung = true;      // hung set first
if (gx_is_on) { ... }       // GX check after
```

The `hung` flag is set *before* the `gx_is_on` check in a8xx but *after* in a6xx. While this probably doesn't cause a functional problem (the flag is consumed during the subsequent RPM suspend), it would be better to match a6xx's ordering exactly if that's the stated intent. Consider moving `a6xx_gpu->hung = true` after the `gx_is_on` block.

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