[PATCH v4 0/2] drm: bridge: ti-sn65dsi83: Fix DSI mode flags for stable LVDS output

[PATCH v4 0/2] drm: bridge: ti-sn65dsi83: Fix DSI mode flags for stable LVDS output

[Sudarshan Shetty]

Hi all,
 
This patch refines dual-link LVDS support in the SN65DSI83/84
DSI-to-LVDS bridge driver.
 
Recent upstream changes added support for dual-link LVDS timing
adjustments and related fixes:
 - Halving horizontal timing parameters
 - Test pattern handling adjustments
 - DSI clock range correction
 
However, during validation on our platform, LVDS output remained
unstable for certain panels due to the DSI mode configuration.
 
Specifically, the following flags were found to cause issues:
 
 - MIPI_DSI_MODE_VIDEO_NO_HFP
 - MIPI_DSI_MODE_VIDEO_NO_HBP
 
These disable transmission of horizontal front porch (HFP) and
back porch (HBP) timings over the DSI link. The SN65DSI bridge
relies on complete horizontal timing information to reconstruct
LVDS timings, and omitting these parameters results in incorrect
or unstable output.

Reference:
SN65DSI84 Datasheet, Section 7.4.7 (page 20):
https://www.ti.com/lit/ds/symlink/sn65dsi84.pdf?ts=1776924088430&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FSN65DSI84

Additionally:
 
 - MIPI_DSI_MODE_VIDEO_BURST
 
While supported by the hardware, burst mode operation depends on
continuous clocking from the DSI host. In practice, this may lead
to instability depending on the host controller implementation,
as the link may transition to LP mode between bursts.
 
Removing these flags ensures that:
 - Full timing information is transmitted
 - The bridge can correctly reconstruct LVDS timings
 - Output remains stable across tested panels
 
This patch updates the DSI mode configuration accordingly.

Changes in v4:
 - Split the original patch into two separate patches:
   - Enable HFP/HBP transmission by removing
     MIPI_DSI_MODE_VIDEO_NO_HFP and
     MIPI_DSI_MODE_VIDEO_NO_HBP
   - Disable MIPI_DSI_MODE_VIDEO_BURST separately
 - Updated commit messages

Changes in v3:
 - Rebased on top of latest upstream changes
 - Dropped previously proposed dual-link DT property and related handling
   as equivalent functionality is now available upstream
 - Refined DSI mode flag configuration to ensure stable LVDS output
 - Added detailed justification for removing NO_HFP/NO_HBP and BURST mode
 
Changes in v2:
 - Introduced ti,dual-link-video-mode DT property
 - Added DT binding documentation for the new property
 - Update driver to read the DT property and apply dual-link
   configuration conditionally
 - Adjust DSI mode flags when dual-link video mode is enabled
 - Update commit messages 

Thanks,
Anusha

Sudarshan Shetty (2):
  drm: bridge: ti-sn65dsi83: Remove NO_HFP and NO_HBP mode flags for
    LVDS stability
  drm: bridge: ti-sn65dsi83: Disable video burst mode for LVDS stability

 drivers/gpu/drm/bridge/ti-sn65dsi83.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

-- 
2.34.1

[PATCH v4 1/2] drm: bridge: ti-sn65dsi83: Remove NO_HFP and NO_HBP mode flags for LVDS stability

[Sudarshan Shetty]

The current DSI mode configuration disables horizontal front porch
(HFP) and back porch (HBP) transmission using
MIPI_DSI_MODE_VIDEO_NO_HFP and MIPI_DSI_MODE_VIDEO_NO_HBP.

However, the SN65DSI83/84 bridge relies on receiving full horizontal
timing information over DSI in order to correctly reconstruct the
LVDS output timings. When HFP and HBP are not transmitted, the bridge
cannot recreate the required timing parameters, resulting in unstable
or missing display output on some panels.

The SN65DSI84 datasheet also describes transmission of complete
horizontal timing information as part of the DSI video stream.

Remove MIPI_DSI_MODE_VIDEO_NO_HFP and MIPI_DSI_MODE_VIDEO_NO_HBP
so that HFP and HBP timing information is transmitted to the bridge.

Reference:
SN65DSI84 Datasheet, Section 7.4.7 (page 20):
https://www.ti.com/lit/ds/symlink/sn65dsi84.pdf?ts=1776924088430&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FSN65DSI84

Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Sudarshan Shetty <tessolveupstream@gmail.com>
---
 drivers/gpu/drm/bridge/ti-sn65dsi83.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index 42b451432bbb..c03ff1ea9df8 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
@@ -977,7 +977,6 @@ static int sn65dsi83_host_attach(struct sn65dsi83 *ctx)
 	dsi->lanes = dsi_lanes;
 	dsi->format = MIPI_DSI_FMT_RGB888;
 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
-			  MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP |
 			  MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET;
 
 	ret = devm_mipi_dsi_attach(dev, dsi);
-- 
2.34.1

Claude review: drm: bridge: ti-sn65dsi83: Remove NO_HFP and NO_HBP mode flags for LVDS stability

[Claude Code Review Bot]

Patch Review

**Verdict: Good patch, should be accepted.**

The change removes `MIPI_DSI_MODE_VIDEO_NO_HFP` and `MIPI_DSI_MODE_VIDEO_NO_HBP` from the DSI mode flags:

```c
 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
-                  MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP |
                   MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET;
```

This is well-justified. The `NO_HFP`/`NO_HBP` flags tell the DSI host it can skip sending horizontal front/back porch periods, but the driver programs these exact values into the bridge chip's registers at lines 672–677:

```c
regmap_write(ctx->regmap, REG_VID_CHA_HORIZONTAL_BACK_PORCH,
             (mode->htotal - mode->hsync_end) / dual_factor);
regmap_write(ctx->regmap, REG_VID_CHA_HORIZONTAL_FRONT_PORCH,
             (mode->hsync_start - mode->hdisplay) / dual_factor);
```

The bridge chip clearly needs these blanking periods to reconstruct valid LVDS timings. Suppressing them on the DSI link while expecting the bridge to use them is inconsistent. The datasheet reference strengthens the argument. Note that `MIPI_DSI_MODE_VIDEO_NO_HSA` is intentionally retained — this is reasonable since the bridge has its own hsync-width register (`REG_VID_CHA_HSYNC_PULSE_WIDTH`) and can reconstruct HSA from the programmed value.

No issues with the code change itself. Two independent Tested-by tags add confidence.

---
Generated by Claude Code Patch Reviewer

[PATCH v4 2/2] drm: bridge: ti-sn65dsi83: Disable video burst mode for LVDS stability

[Sudarshan Shetty]

The current DSI configuration enables MIPI_DSI_MODE_VIDEO_BURST.
while burst mode is supported by the hardware, its use
depends on continuous clock behavior from the DSI host. In practice,
burst mode may introduce instability depending on the host controller
implementation, as the DSI link may transition to low-power state
between bursts.

Testing showed improved display stability when using non-burst mode on
affected panels.

Remove MIPI_DSI_MODE_VIDEO_BURST and use non-burst video mode.

Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Sudarshan Shetty <tessolveupstream@gmail.com>
---
 drivers/gpu/drm/bridge/ti-sn65dsi83.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index c03ff1ea9df8..6b5a6019c30d 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
@@ -976,8 +976,8 @@ static int sn65dsi83_host_attach(struct sn65dsi83 *ctx)
 
 	dsi->lanes = dsi_lanes;
 	dsi->format = MIPI_DSI_FMT_RGB888;
-	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
-			  MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET;
+	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_NO_HSA |
+			  MIPI_DSI_MODE_NO_EOT_PACKET;
 
 	ret = devm_mipi_dsi_attach(dev, dsi);
 	if (ret < 0) {
-- 
2.34.1

Claude review: drm: bridge: ti-sn65dsi83: Disable video burst mode for LVDS stability

[Claude Code Review Bot]

Patch Review

**Verdict: Acceptable but with a reservation about regression risk.**

The change removes `MIPI_DSI_MODE_VIDEO_BURST`:

```c
-	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
-			  MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET;
+	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_NO_HSA |
+			  MIPI_DSI_MODE_NO_EOT_PACKET;
```

Without `MIPI_DSI_MODE_VIDEO_BURST`, the DSI link will operate in non-burst sync-event mode. The justification — that burst mode depends on continuous clocking behavior from the DSI host and may be unreliable — is plausible but somewhat generic.

**Points to consider:**

1. **Regression risk:** Unlike patch 1 (where the logic was clearly contradictory), burst mode is a valid DSI mode and this driver has shipped with it since its introduction. Removing it could cause issues on platforms where burst mode is currently working and non-burst mode is not — different DSI host controllers may behave differently. The Tested-by tags are from only two platforms.

2. **The commit message is honest** about the nature of the problem ("depending on the host controller implementation"), which is good. However, it would benefit from naming the specific DSI host controller or SoC where the instability was observed to help future readers understand the scope.

3. **No `Fixes:` tag** is present on either patch. If this is considered a bug fix (which the title "for LVDS stability" implies), a Fixes tag pointing to the original commit that added burst mode would be appropriate for backport tracking.

4. **`MIPI_DSI_MODE_VIDEO_NO_HSA` and `MIPI_DSI_MODE_NO_EOT_PACKET` are retained.** This is fine — `NO_HSA` is a reasonable optimization when the bridge programs hsync width via register, and `NO_EOT_PACKET` is commonly used with TI bridges.

The code change itself is trivially correct — it's just flag removal and reformatting the line continuation. No functional issues with the implementation.

---
Generated by Claude Code Patch Reviewer

Claude review: drm: bridge: ti-sn65dsi83: Fix DSI mode flags for stable LVDS output

[Claude Code Review Bot]

Overall Series Review

Subject: drm: bridge: ti-sn65dsi83: Fix DSI mode flags for stable LVDS output
Author: Sudarshan Shetty <tessolveupstream@gmail.com>
Patches: 3
Reviewed: 2026-05-28T12:36:18.878762

---

This is a straightforward 2-patch series that removes three DSI mode flags (`MIPI_DSI_MODE_VIDEO_NO_HFP`, `MIPI_DSI_MODE_VIDEO_NO_HBP`, and `MIPI_DSI_MODE_VIDEO_BURST`) from the ti-sn65dsi83 bridge driver to improve LVDS output stability.

The changes are well-motivated. The driver explicitly programs HFP, HBP, hsync, and vsync timing values into the bridge chip's registers (lines 666–679), meaning it depends on receiving these values from the DSI host. Using `NO_HFP`/`NO_HBP` flags instructs the DSI host to suppress transmission of those blanking periods, which is contradictory — the bridge needs that timing information to reconstruct valid LVDS output. The removal makes the driver's DSI-side configuration consistent with the register programming on the LVDS side.

The split into two patches (HFP/HBP flags vs. burst mode) is appropriate since the two changes have different justifications and different risk profiles. The series has Tested-by tags from two independent testers (Luca Ceresoli and Alexander Stein), providing good validation.

**Concern:** These are behavioral changes that affect all users of this driver, not just the submitter's platform. Removing burst mode (patch 2) could be a regression for platforms that currently work with burst mode. The commit message for patch 2 is honest about this ("depending on the host controller implementation") but doesn't explain why non-burst mode is universally correct. This is worth scrutiny from the maintainers.

Overall: Patch 1 is clearly correct. Patch 2 is reasonable but more debatable.

---
Generated by Claude Code Patch Reviewer